You repeat very common misconception and false analogy.
You don't get high volume processor core into silicon by just hacking Verilog/VHDL in your computer and then send it to the foundry for tape-out and manufacturing like you do with some custom ASIC chip.
Intel and AMD start new microarchitecture design work every 2-3 years. The work must progress in tight time schedule or it becomes outdated. It's highly coordinated effort that requires significant capital investment.
You have to lock in goals, select implementation technology, methodology, have expensive tools etc. Behavioral design, physical design and silicon ramp interact constantly. Problems are solved and there are many optimization and validation phases. You need expensive hardware and access to engineers in the foundry and process you are targeting.
I'm sure there will be many completely open RISC-V cores, but not for the high volume uses or latest processes.
You yourself repeat a very common misconception and false analogy.
Intel and AMD start new microarchitecture design work every 2-3 years because (Intel, at least) base their sales on offering the latest and greatest. They seek peak performance, which is exactly what gamers/scientists/prosumers want.
But for large swaths of the market, you don't need that. Think of your average consumer/small business owner. By and large, most of them are using 3-5 year old PCs, and even then the processors within those 3-5 year old PCs were probably last-gen when they were purchased.
Or think military -- the ability to have a home-grown, openly-vetted processor that you can tape out with a trusted domestic supplier would eliminate a number of security concerns.
Don't let great be the enemy of good here. If you can build a decent RISC-V core that can compete with an Intel Core 2 Duo, you've got all the horsepower you need for the average consumer.
I did not deny that there will be completely free designs for small volume applications and specific niches. They will be very low performance and not going to be competitive in mass markets in low price or high price.
> Think of your average consumer/small business owner.
Optimizing processor for low-cost price is also very demanding.
nonsense. rocket-chip has been taped out at 45nm and achieved 1.5ghz, years ago. india's shakti core is going into 20nm and as a 6-stage pipeline will run at 2.5ghz. as that one uses only 120mW, even 16 2.5ghz cores would only consume around 3 watts (!!!).
caveat of course: the L1/L2 cache power consumption isn't included in that figure, but, crucially, with the Compressed Instructions reducing cache misses by 20-25% that's equivalent to having approximately double the I-cache size.
basically by a fresh start they're on to a winner.
Maybe a Pentium IV then? I don't think RISC-V -- or any processor really -- gets taken seriously in the desktop/laptop space unless it can compete with one of Intel's earlier chips.
Unlikely that anyone will even try to target desktop/laptop market with a RISC-V CPU, it is a very established market without much future growth. The plays will be in embedded devices, especially areas which requires pheripherals with tight integration with the CPU, this is where an open and extensible ISA can be a significant benefit.
Examples today are controllers inside SSDs/SDcards. In future maybe also microcontrollers with integrated machine/deep learning co-processors.
You don't get high volume processor core into silicon by just hacking Verilog/VHDL in your computer and then send it to the foundry for tape-out and manufacturing like you do with some custom ASIC chip.
Intel and AMD start new microarchitecture design work every 2-3 years. The work must progress in tight time schedule or it becomes outdated. It's highly coordinated effort that requires significant capital investment.
You have to lock in goals, select implementation technology, methodology, have expensive tools etc. Behavioral design, physical design and silicon ramp interact constantly. Problems are solved and there are many optimization and validation phases. You need expensive hardware and access to engineers in the foundry and process you are targeting.
I'm sure there will be many completely open RISC-V cores, but not for the high volume uses or latest processes.