Not true from what I’ve read. The problem with x86 is not complexity but variable instruction lengths. This makes it hard to determine instruction boundaries, complicating decoders and making more than 4-way decode hard. M1 has 8 decoders for comparison, and it would be easy to have 100 with ARM if there were a benefit to that many.
1. AMD64 is a lot easier to decode than the legacy i86 8/16/32 bit instruction set.
2. Decoding took a significant portion of the chip when they were a million transistors. The m1 has 16 billion resistors, decoding is a much less significant fraction of the chip.
> The limitation of the x86 decoder is that each clock cycle can only process up to 4 instructions, but if it is a familiar instruction, it can be placed in the operation cache, and 8 instructions can be processed per cycle.
M1's awesomeness has to do with:
- assembling a killer team - 5nm process - high speed, low latency DRAM - big-little
The only substantive difference between the AMD64 and ARM64 instruction sets is that ARM64 has a more relaxed memory model.